1. Field of Use
This invention relates generally to data processing systems and more specifically to the control of the clocking signals and data signals during the transmission of data from a communications controller to a direct connect device such as a cathode ray tube display.
2. Description of the Prior Art
Highly flexible and cost effective communications subsystems have been provided for coupling data processing systems to communication channels such as those associated with a publicly accessible (e.g. telephone) communications network. Such systems have been embodied in hardware/firmware architectures which respond to commands from a communication processor associated with a central mode, a transmit mode, or concurrent transmit/receive modes for transferring data messages between the communication processor and the communication channel. Data transfers occur under the control of a firmware system acting in concert with a microprocessor within the adapter to assemble and disassemble whole or partial data bytes of varying bit sizes. System architectures which have been used readily accommodate an expansion of capacity and exhibit dynamic flexibility.
However, present day communication line adapter systems are not able to process data where the device such as a cathode ray tube display is coupled to the adapter by a long cable and receives data signals in the order of 1,200 to 19,200 bits per second.
Prior art systems such as described in U.S. Application Ser. No. 53,110 which was abandoned May 29, 1981 entitled, "Communication Line Adapter for a Bit and Byte Synchronized Data Network" and U.S. Pat. No. 4,254,462 issued Mar. 3, 1981 entitled, "Hardware/Firmware Communication Line Adapter" and having the same assignee as the instant application, describe a system whereby the clocking signals for the transmission of data from the controller to the device were routed to the device and back to the controller for the clocking of data signals to the device. This gave the controller the appearance of always operating from an external clock. This approach satisfied the requirements of the prior art systems where the devices were relatively close to the controller with communications logic mounted on a single printed circuit board.
However, with the requirement to locate the device at a considerable distance from the communications controller, typically 4000 feet, the circuit delays in the clocking signals and the data signals in the prior art systems would result in marginal operation particularly at the higher baud rate.